SiTime has launched its Chorus 2 programmable clock generators, which are now in volume production.
The devices are aimed at systems that combine multiple chip types, including FPGAs, ASICs, GPUs and CPUs, where designers must manage different frequencies across a single platform.
Clocking has become a more prominent issue in AI training clusters, smart factory vision systems and SmartNIC-based networking platforms as hardware designs shift towards heterogeneous architectures. In these systems, engineers have often used separate timing devices for each chip, adding components and increasing power use.
Chorus 2 is designed to replace multiple discrete oscillators or clock signals with a single device. Depending on the model, the range can replace up to eight or 12 discrete oscillators or clock signals.
The launch includes two versions: the SiT95272, with 12 outputs in a 6 mm x 6 mm 48-pin QFN package, and the SiT95278, with eight outputs in a 5 mm x 5 mm 40-pin QFN package. Both are available for immediate sampling, according to SiTime.
Performance claims
SiTime said the Chorus 2 family delivers up to twice the performance of competing products, with up to two times lower jitter and up to 2.5 times lower output skew. The devices also support PCIe Gen7 compliance and provide four independent spread spectrum clocks.
Each output can be set to a different frequency or operating condition, with up to 20 custom one-time programmable configurations supported on a device. Unused outputs can be disabled, which can reduce power use and noise.
One design goal is to simplify timing distribution in systems that need multiple PCIe and SerDes clocks. This is particularly relevant in data centre servers and GPU baseboards, where PCIe switches and retimer ASICs can require several separate clock sources.
The products also target mid-tier networking equipment, industrial systems and higher-end consumer electronics. The devices are pin-to-pin compatible with other products on the market, which could allow them to be used as replacements in existing designs.
Design shift
The release reflects a broader change in semiconductor system design, with timing control moving from a supporting component to a more central part of board architecture. As more systems rely on mixed processors and accelerators, synchronisation across components has become harder to manage.
That has increased demand for programmable clock generators that can cover a wide frequency range while maintaining signal integrity. The challenge is more acute in AI and high-performance computing equipment, where interconnect standards and data rates continue to rise.
According to SiTime's technical specifications, Chorus 2 offers jitter below 110 femtoseconds at 156.25MHz and a low-noise coupling multiplexer design that supports fractional-divider frequency selection. The company said this allows designers to assign nearly any frequency clock from the available outputs.
Spread spectrum support is intended to help designers in environments where electromagnetic interference management is a concern. By offering four independent spread spectrum clocks, the devices can support multiple timing domains within a single platform.
Output skew is also a critical metric in systems where several devices must remain aligned. SiTime said Chorus 2 cuts skew variation by about 1.6 to 2.5 times compared with rival products, which it positions as important for signal synchronisation across complex boards.
"What once required a collection of discrete functions is now converging into a unified foundation of precision and control, delivering the performance, functionality and flexibility needed to power the next generation of electronic systems."