Microsemi Corporation and Silicon Creations are teaming up to develop the industry's lowest power field programmable gate array (FPGA).
This will be done with 12.7 Gbps transceivers and using Serializer/Deserializer (SerDes) PHY from Silicon Creations.
According to the two companies, with total power for the PHYs as low as 4.5mW/GB/lane that has resulted in the FPGA industry's lowest power 12.7Gbps transceivers and output random jitter below 0.35ps RMS at 12.7 Gbps, make the PHYs suitable for transmitting data over OIF and IEEE802.3 compliant short- and long-reach channels at ultralow power.\
"Our collaboration with Silicon Creations to develop and integrate a highly innovative PHY technology with a rich physical coding sublayer has provided the FPGA industry with a highly compelling multiprotocol transceiver solution that will solve problems across multiple market segments, says Lyle Smith, vice president of product development engineering for Microsemi's system-on-chip (SoC) business unit.
"Silicon Creations was diligent in providing high quality verified PHY intellectual property on schedule, and provided critical signal integrity and integration support enabling Microsemi to deliver PolarFire silicon that met or exceeded target specifications on performance and power consumption."
"We are honored Microsemi chose to work with us on this project," adds Andrew Cole, Silicon Creations' vice president.
"Microsemi challenged us to perform at our best and saw value in our commitment to do what it takes to make the project successful.
We met or exceeded all of the goals and, in doing so, created IP that will be valuable to a wide range of users."